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The
MiMagic 3 Applications Processor provides:
 High System Performance 110 MHz 32-bit ARM V4T
compliant RISC processor (ARM720T) with two independent
bus architecture (32-bit Static Memory bus and 16-bit
SDRAM bus) providing separate interfaces for simultaneous
access to program store and system memory eliminating
shared bandwidth bottleneck. Split bus enables XIP feature,
optimizing system performance. Dynamically assignable
DMA controller.
Very Low System Power Consumption Low power
0.18 µm 1.8 V process. SDRAM interface operates at
1.8 V or 3.3 V; 80 KB of internal SRAM buffer for display
refresh without external memory access; frequently used
code (e.g. MP3 Software decode) or data (e.g. MPEG-4
decoded intermediate data) can be stored in the SRAM
buffer to minimize external memory fetches during program
executions. Multiple power down modes including run mode
at programmable frequencies, idle and standby. For Standby
mode, both CPU and system bus clocks are shut off with
LCD display either on or off.
Multimedia High speed DMA-backed Video Port.
Multiple Boot Options Flash, UART, MultiMediaCard,
and serial EPROM. These options are useful in product
development, production or for fi eld software upgrade.
Wireless connectivity Support for Bluetooth, IrDA and
Baseband through serial (UARTs, USB, SPI) interfaces.
Low System Cost through Integration Supports low-cost NAND Flash. Rich set of onchip
peripherals including color LCD controller,
SD Card, MultiMediaCard, USB Host and Function
(including USB transceiver), serial I/O, and audio
I/O resulting in lower Bill of Materials and very
small footprint (11x11x1.0 mm).
Multiple Boot Options Linear Flash, NAND Flash, UARTs, SD card, MultiMediaCard, Serial EPROM and unique capability to boot by another processor using Shared MailBox Interface. Useful in code development, production or for field software upgrades
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 The MiMagic 3 Applications Processor is
ideal for mobile personal communication,
productivity, and entertainment products such as:
Smartphones and Mediaphones
PDAs and Wireless PDAs
Audio/Video Players
Handheld Information Appliances
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Download files:
-  MiMagic
3 Product Brief
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High Performance, Low Power ARM720T CPU
32-bit ARM V4T instruction set with 16-bit extensions (THUMB)
8 KB four-way set-associative unified cache
MMU with 64 entry TLB
Up to 110 MHz in Asynchronous Mode
Dual
Memory Subsystem
Dynamic/Static Memory Control
SDRAM for high performance systems
2 or 4 internal banks per SDRAM device
Supports 16 bit wide 1.8-3.3 V SDRAM at speeds up to 74 MHz
Separate data path for LCD refresh activities
Static Memory Control
16/32 bit wide data path for SRAM, Flash (NOR and
NAND), ROM and External I/O
Five memory segments of up to 64 MB each
Each segment confi gurable as 16/32 bits
Programmable access time
PC Card
/CompactFlash
Interface to PC Card/CompactFlash through NeoMagic NMC1121
80 KB On Chip SRAM
On-Chip LCD frame buffer: reduces power and memory bandwidth requirements
On-Chip program/data storage to speed up program execution
Display Subsystem
Color/Mono LCD Controller
- 640 x 480 STN/DSTN or TFT
- Supports up to 16 bpp (64 k colors)
Video Support
High speed data port, 16 MBytes/s with DMA (video port)
SD Card Controller (24 MHz)
MMC Compatible
MMC Card Controller
Smart Card interface
Audio Interface with DMA
AC97 Interface (V 2.1)
- Stereo Audio support
- Variable Sample Rate, 16-Bit
- Modem support
I²S Serial Interface
- Stereo Audio support, 16-Bit
USB Host (USB 1.1)
Host interface at 1.5 and 12 Mbps
On-chip transceiver option
DMA support
USB Function (USB 1.1)
Function interface 12 Mbps
Control, bulk in/out and interrupt transfer modes
On-chip transceiver option
DMA support
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Serial Communication Subsystem
3 DMA backed UARTs, up to 460 Kbps
- One with modem control signals
- Support for Bluetooth rates
IrDA 115 Kbps, 1.152 Mbps and 4 Mbps
Serial Interface Bus with DMA
Philips UCB1200 Interface (telephone codec, touchscreen interface, audio codec)
Synchronous Serial Ports with DMA
SPI/ Microwire interface with Master/Slave modes,
runs up to 9.2 MHz
Power Management
Run / Idle / Standby modes
Software controlled state transitions
Supports low power SDRAM (1.8 V Core/IO)
Built-in 80 KB low power SRAM for LCD frame
buffer to reduce power consumption
Dynamic Frequency Switching
- 18/ 36/ 74 MHz in synchronous CPU mode and up to
110 MHz Async. mode
System Control
Two 16 bit timer/counters
Interrupts: 3 external IRQ, 1 external FIQ
Programmable buzzer output
32-bit real time clock (RTC)
Up to 77 GPIOs
8 DMA Channels
Tri-State Outputs and I/O allow high impedance test mode
On-Chip Debug and ICE Support
JTAG for MultiICE interface
1 KB On-chip Boot ROM
Boot through MultiMediaCard, UART or MIIC
Sequence programmable by bootstrap options
Small Package
FlexBGA package 280-pin 0.8 mm ball pitch
- Body size 16 x 16 mm, 1.2 mm high
TABGA package 280-pin 0.5 mm ball pitch
- Body size 11 x 11 mm, 1.0 mm high
Operating Range
1.8V ± 5% core; 3.3V ± 10% I/O
Commercial/Industrial Temperature support
Estimated Typical Power Consumption
Run : 90 mW at 74 MHz, 1.8V
Run : 120 mW at 110 MHz, 1.8V, CPU Async Mode
Idle : 35 mW
Standby : 0.6 mW
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